Rotary Pipeline Processors

نویسندگان

  • Simon Moore
  • Peter Robinson
  • Steve Wilcox
چکیده

The rotary pipeline processor is a new architecture for superscalar computing. It is based on a simple and regular pipeline structure which can support several ALUs for efficient dispatching of multiple instructions. Register values flow around a rotary pipeline, constrained by local data dependencies. During normal operation the control circuits are not on the critical path and performance is only limited by data rates. The architecture is particularly well suited to implementation using self-timed logic.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Operation Analysis of Rotary Tools of Compressor Station Using Exergy Approach

In this study, operation of compressor station has been investigated by exergy approach. Exergy analysis is a thermodynamic method which shows the irreversibility of a system quantitatively. Gas compressors are used to compensate the pressure drop along the gas pipeline significantly. The compression process causes temperature rise of gas; in this regard gas cooler is applied to reduce the temp...

متن کامل

Analysis of Pipeline Fft Processors and Optimized for Fpga

Pipeline FFT processors are used in mobile communication systems and in particular in OFDM-based systems. This paper presents a method for power analysis and clock optimization of pipeline FFT processors for particular OFDM baseband system. This method is applied to various architectures with different radices. The analysis can be used in the design of high speed pipeline FFT processors.

متن کامل

Word Length Estimation for Memory Efficient Pipeline FFT/IFFT Processors

The Fast Fourier Transform (FFT) and its inverse transform (IFFT) processors are a key component in many communication systems. This paper presents a simulation-based method to determine the data word length for pipeline FFT/IFFT processors. This method allows designer to control the estimation process for dedicated approaches and applied to the pipeline architectures in order to lower memory r...

متن کامل

Determining Asynchronous Pipeline Execution

Asynchronous pipelining is a form of parallelism in which processors execute diierent loop tasks (loop statements) as opposed to diierent loop iterations. An asynchronous pipeline schedule for a loop is an assignment of loop tasks to processors, plus an order on instances of tasks assigned to the same processor. This variant of pipelining is particularly relevant in distributed memory systems (...

متن کامل

Balancing a Pipeline

Reduction of a matrix to triangular form plays a crucial role in the solution of linear equations. In this chapter, I analyze a pipeline algorithm for Householder reduction (Brinch Hansen 1990). The pipeline is folded several times across an array of processors to achieve approximate load balancing. The pipeline inputs, transforms, and outputs a matrix, column by column. During the computation,...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 1996